The present invention relates generally to graphics processors, and more particularly to dynamic memory clock adjustments made by a graphics processor.
Graphics processors access and process huge volumes of data while generating video images for display on a monitor. Much of this data is stored and retrieved from a memory, such as a dynamic random-access memory (DRAM). Often these DRAMs are manufactured using a highly specialized process, and are therefore manufactured on an integrated circuit separate from the graphics processor itself. A graphics processor may store and retrieve data from one or more of these DRAMs. In order to facilitate the timing of data transfers between the graphics processor and memory, the graphics processor provides a clock signal, referred to as a memory clock (MCLK) to the memory circuits.
There are several conditions under which it is desirable for a graphics processor to change the frequency of a memory clock signal. For example, during startup and when power can be saved (or can no longer be saved), it is desirable to increase or decrease the frequency of the memory clock signal.
During startup, a splash screen is typically displayed identifying the operating system or other aspect of the computer system. This image is often at lower resolution, for example it may be compatible with the VGA standard. Once driver software is loaded into the computer system, images are displayed at a higher resolution. This change in resolution is facilitated in part by a change in the frequency of the memory clock signal. Also, if the screen image is not changing, for example when the text of a patent is being read by the user, the graphics processor may be able to run at a lower clock speed. This reduction in speed results in power savings that reduces battery drain in mobile applications and increases the mean time-before-failure of the graphics processor circuit.
When these changes in memory clock signal frequency occur, it is very desirable to not glitch or otherwise create a visual disturbance on the video monitor. Accordingly, what is needed are methods, circuits, and apparatus for changing a memory clock signal frequency without causing these disturbances.